The AI Hardware Supply Chain, End to End: From a Single GPU to a Data Center, Where Are the Eight Chokepoints in the Global Lifeline?

From a single GPU to a whole data center: where the global AI-hardware lifeline gets stuck across eight gates, with TSMC, HBM and CoWoS all in the mix.

10/12 · Penna

Eight layers of the AI hardware supply chain: from AI chips, HBM, advanced packaging, and foundry, to optical interconnect, liquid cooling, data centers, power, and export controls

Contents

When the news says “a company bought tens of thousands more Nvidia GPUs,” it sounds like plugging in graphics cards. In reality, an AI chip first has to be etched in a fab, packaged together with memory, linked by optical fiber into a cluster of thousands, cooled rack by rack, and then placed in a data center that uses a lot of power. That whole path is the “AI hardware supply chain.”

Its lifeline runs through a few points, and two of them are in Taiwan. To look at individual companies, see the AI industry overview.

AI chip supply chain flow chart: chip design, foundry, packaging (CoWoS), server assembly and data center connect left to right, each with example companies. EUV lithography feeds into the foundry from below, HBM memory into packaging, and cooling and power into the data center. Foundry, packaging, server assembly, and cooling and power have orange borders, marking stages where Taiwan plays a major role. — The main stages an AI chip passes through from design to data center. Orange borders mark where Taiwan plays a major role.

The Whole Chain in 30 Seconds

Gate	What it does	Key players	How tight is it?
1 AI chips	Decides what compute looks like	Nvidia, AMD, Google TPU	Nvidia leads
2 HBM memory	Feeds data to the chip	SK Hynix, Samsung, Micron	✅ Three-company oligopoly
3 Advanced packaging	Bonds chips and memory into one unit	TSMC CoWoS, ASE	✅ Not enough capacity
4 Foundry	Etches the design onto silicon	TSMC; equipment from ASML	✅ Process + EUV
5 Optical interconnect	Links thousands of chips into a cluster	Optical-module and silicon-photonics makers	High technical bar
6 Cooling and liquid cooling	Removes the heat of a full rack	Delta Electronics, AVC, Vertiv	Tighter as power rises
7 Data centers and power	Builds facilities and connects power	Cloud giants, power companies	✅ Grid-limited
8 Export controls	Decides who can buy	U.S., allies, China	Cross-layer variable

Gate 1 · AI Chips (GPUs)

A GPU uses many small cores computing at the same time, which fits AI’s matrix math well. Nvidia leads this gate, and its moat includes the CUDA software ecosystem. In the quarter ending July 2026, Nvidia’s data-center revenue was $89 billion, up 117% year over year. Blackwell is still the main shipping product; in August 2026 NVIDIA said Vera Rubin had begun volume shipments. AMD and the cloud giants’ in-house chips (such as Google TPU) are chasing.

Taiwan in this gate: Nvidia’s full-rack systems are mostly assembled by Taiwanese companies such as Foxconn, Quanta, and Wistron.

Further reading: AI chips · GPU · GPU vs CPU · Blackwell · ASIC · TPU · Nvidia supply chain · Unified memory

Gate 2 · HBM High-Bandwidth Memory

HBM stacks memory vertically and places it right next to the GPU. Think of it as very wide memory standing up, so the GPU doesn’t have to wait for data. According to Counterpoint, Q2 2026 HBM revenue share was SK Hynix 50%, Samsung 33%, and Micron 18%. All three companies’ HBM4 has passed Vera Rubin qualification (Jensen Huang, June 2026). Supply is still tight: Micron says most of its 2027 HBM supply is already under contract.

Taiwan in this gate: Micron makes HBM in Taiwan, and Taiwan also has the packaging lines that integrate HBM with the GPU.

Further reading: HBM · HBM4 · HBM stocks

Gate 3 · Advanced Packaging (CoWoS)

The GPU and HBM need to move nearly 20 TB of data per second between them, which a normal circuit board can’t do. TSMC’s CoWoS integrates them side by side in one package. Almost every high-end AI chip needs it, so packaging capacity directly decides GPU shipments. TSMC chairman C.C. Wei said in July 2026 that packaging capacity was so tight it “limited customers’ growth.” TSMC doesn’t publish its capacity; according to media estimates compiled by TrendForce, monthly capacity grows from about 70,000 wafers at the end of 2025 to about 130,000–140,000 by the end of 2026.

Taiwan in this gate: The main capacity is in Taiwan, and ASE and SPIL are expanding too. TSMC’s first packaging plant in Arizona only broke ground in 2026.

Further reading: CoWoS · Advanced packaging · Glass substrates

Gate 4 · Foundry and Lithography Equipment

A foundry makes chips for other companies: Nvidia designs, TSMC manufactures. According to TrendForce, TSMC held 72.5% of the global foundry market in Q2 2026, with second-place Samsung at 5.9%. In the same quarter, 7nm and below made up 77% of TSMC’s wafer revenue.

Further upstream, the most advanced processes rely heavily on extreme-ultraviolet (EUV) lithography machines, which only the Netherlands’ ASML can mass-produce; some 7nm processes can still use DUV.

Taiwan in this gate: TSMC expanded its Arizona investment plan to $265 billion, but 2nm enters volume production in Taiwan first; the U.S. fabs won’t reach this generation until the end of the decade.

Further reading: Foundry · Advanced process · TSMC 2nm · EUV · ASML · Semiconductor equipment · Taiwan semiconductors

Gate 5 · Optical Interconnect

Thousands of GPUs exchange data constantly. At high speeds, signals over copper fade, so clusters switch to light, with speeds moving from 800G toward 1.6T. The next step is co-packaged optics (CPO), which puts the optical engine right next to the switch chip to save power. Nvidia announced its CPO switches were in full production in August 2026.

Taiwan in this gate: TSMC’s silicon-photonics platform, COUPE, has started production.

Further reading: Silicon photonics · CPO

Gate 6 · Cooling and Liquid Cooling

A GB300 NVL72 rack with 72 GPUs draws about 130–140 kilowatts (GIGABYTE spec). Fans and air conditioning can’t handle that, so coolant flows straight through cold plates on the chips, or servers are submerged in liquid (immersion cooling). TrendForce estimates the share of AI chips using liquid cooling will rise from about 33% in 2025 to 53% in 2026.

Taiwan in this gate: In an August 2026 forecast, TrendForce expected AVC to ship Vera Rubin cold plates in Q3. According to media reports, Delta Electronics’ coolant distribution units are on Nvidia’s qualified list.

Further reading: Liquid cooling · Immersion cooling · AI server stocks · ODM

Gate 7 · Data Centers and Power

The International Energy Agency estimates global data-center electricity use will go from 485 TWh in 2025 to about 950 TWh in 2030. Amazon, Google, Microsoft, and Meta’s 2026 capex guidance adds up to about $720–745 billion. The cloud giants have also signed nuclear power deals, but most new-type nuclear plants are still under review or construction. In some regions, the grid and land have become as much of a limit as chips.

Taiwan in this gate: Taiwan mainly supplies power supplies, uninterruptible power systems, and liquid-cooling equipment. It is not a major data-center hub.

Gate 8 · Geopolitics and Export Controls

This gate is a layer of rules over the other seven: who can buy high-end GPUs and who can make advanced processes is decided by the export rules of the U.S. and its allies.

A narrow door for the H200: From January 15, 2026, U.S. exports to China of chips below the top tier, like the H200, moved to conditional case-by-case review. The chips must first go through testing in the U.S., and a 25% tariff applies. Actual shipments are small: Nvidia said they were under 1% of its data-center revenue for the quarter ending July 2026, and Beijing also approves each purchase one by one.
Allied equipment: The MATCH Act (scaled back in April 2026) would fully restrict ASML’s DUV immersion machines for China, require licenses for servicing, and push allies to follow. As of late September 2026, it was still stuck in the Senate.
The tiers no longer apply: The early-2025 “AI Diffusion” framework once put Taiwan in Tier 1, but the U.S. stopped enforcing it from May 2025, and in July 2026 said it would not write a replacement rule.
China’s own chips: Huawei says the Atlas 950 is in large-scale commercial use, and the Ascend 960 is expected in 2027.

Further reading: Chip war · Export controls · Silicon shield

Which Gates Are the Tightest?

Tightest link	Why it’s tight	Concentrated in
Advanced process (7nm and below)	All high-end AI chips depend on it	🇹🇼 TSMC
CoWoS advanced packaging	Decides GPU shipments	🇹🇼 Taiwan
HBM memory	Three-company oligopoly, tight supply	🇰🇷 South Korea, 🇺🇸 Micron
EUV lithography equipment	Key equipment for the most advanced processes	🇳🇱 ASML

Penchan’s summary

The AI compute race is really a race over hardware and capacity: if you can’t make the chips, can’t package them, or can’t supply the power, even the strongest model can’t run.

The bottlenecks are concentrated in Taiwan. That is strategic value, and also the single-point risk the world cares about most.

The next ceiling may be power. Whoever can solve power supply, cooling, and energy efficiency holds the key to the next round.

FAQ

Why does AI usually run on GPUs? Can CPUs run it too?

CPUs can run AI too. Large-scale training needs huge amounts of matrix math, and GPUs are good at handling it in parallel, so they are usually more efficient. Inference can run on CPUs, GPUs, or other accelerators, depending on model size and needs.

What is CoWoS, and why is everyone scrambling for it?

CoWoS is TSMC’s advanced packaging technology. It integrates a GPU and several HBM memory chips in one package to make a single AI accelerator module. Almost every high-end AI chip needs it, and at its July 2026 earnings call TSMC said packaging capacity was so tight it limited customers’ growth. So CoWoS capacity directly decides how many GPUs can ship.

How is HBM different from regular computer memory?

Regular DRAM is laid out flat. HBM (high-bandwidth memory) stacks memory layers vertically and connects them to the side of the GPU through a very wide interface. This gives huge data bandwidth, so the GPU doesn’t sit waiting for data. Three companies dominate: by Q2 2026 revenue share, SK Hynix leads, Samsung is second, and Micron is third (Counterpoint).

How important is Taiwan in the AI supply chain?

According to TrendForce, TSMC held 72.5% of the global foundry market in Q2 2026, and almost all high-end AI chips rely on its 7nm-and-below processes. CoWoS advanced-packaging capacity is also mainly in Taiwan. Both key manufacturing steps for the world’s high-end AI chips sit in Taiwan, which is why the whole world watches the Taiwan Strait so closely.

How much power do AI data centers use?

The International Energy Agency estimates global data-center electricity use will go from 485 TWh in 2025 to about 950 TWh in 2030. Amazon, Google, Microsoft, and Meta’s 2026 capex guidance adds up to about $720–745 billion, and whether the grid can keep up is becoming one of the limits on AI expansion.

With U.S. chip export controls, can China buy high-end GPUs now?

Starting in January 2026, the U.S. changed its review of exports to China for chips below the top tier, like the H200, from a presumption of denial to conditional case-by-case review. But actual shipments are small: Nvidia said they were under 1% of its data-center revenue for the quarter ending July 2026, and Beijing also requires approval for each purchase. The top-tier chips and equipment are still restricted.

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